Post by Siemens EDA (Siemens Digital Industries Software)

When Arm set out to verify their AGI CPU, the challenge was immense — scale 10 billion+ gate monolithic models, run realistic AI workloads across multiple CSS sub-systems simultaneously, and stack dozens of high-speed interfaces. And they knew that being able to run the workload was only the first step. Finding and fixing bugs quickly was the whole point. That required full visibility without the need to instrument the design after a failure. It meant software solutions that drive stimulus at a proven 98% of theoretical maximum — running dozens of PCIe Gen 6 instances, NVMe, CXL, and memory controller endpoints while executing Arm Compliance Suite on top of it, all to stress the design to its limit. And it required channel bandwidth that did not slow the DUT clock down when those interfaces were running at full load. So, they chose Veloce Strato CS and Veloce proFPGA CS — powered by Crystal X, Siemens' custom silicon architecture built from the ground up for emulation. Benjamin Whitehead shares the story in this article ⤵️