Post by Paritosh Chandgude
VLSI Physical Design Engineer | RTL-to-GDSII | ASIC | CTS | STA | Fresher | Open to Work
76 VLSI Physical Design Interview Questions β Floorplanning πΊοΈ Questions that make your concepts clear and make you ready for interviews β π Topics Covered: π Netlist (Input to Floorplanning) β 4 Q π Calculate Core Area β 4 Q π Calculate Die Area β 4 Q π Set Utilization β 4 Q π Aspect Ratio β 4 Q π Create Core Boundary β 4 Q π Place IO Pads β 4 Q π Place Macros β 4 Q π Macro Clustering β 4 Q π Flyline Analysis β 4 Q π Macro Optimization β 4 Q π Channel Spacing β 4 Q π Halo Creation β 4 Q π Routing Channel Creation β 4 Q π Placement Blockages β 4 Q π Check Congestion β 4 Q π Check Macro Overlaps β 4 Q π Floorplan Verification β 4 Q π Power Planning β 4 Q π’ Target Companies: NVIDIA Β· Intel Β· Google Β· Qualcomm Β· AMD Β· Apple Β· Broadcom Β· STMicroelectronics Β· Cadence Β· Synopsys Β· Samsung Β· TSMC #VLSI #PhysicalDesign #Floorplanning #VLSIInterview #ChipDesign #VLSIEDA #STA #PowerPlanning #Semiconductor #InterviewPrep #ECEStudents #ECEGraduate #EngineeringStudents #JobPreparation #PlacementPrep #NVIDIA #Intel #Google #Qualcomm #AMD #Apple #NowHiring #FusionCompiler #Cadence #Synopsys