Post by Paritosh Chandgude

VLSI Physical Design Engineer | RTL-to-GDSII | ASIC | CTS | STA | Fresher | Open to Work

76 VLSI Physical Design Interview Questions β€” Floorplanning πŸ—ΊοΈ Questions that make your concepts clear and make you ready for interviews βœ… πŸ“š Topics Covered: πŸ’  Netlist (Input to Floorplanning) β€” 4 Q πŸ’  Calculate Core Area β€” 4 Q πŸ’  Calculate Die Area β€” 4 Q πŸ’  Set Utilization β€” 4 Q πŸ’  Aspect Ratio β€” 4 Q πŸ’  Create Core Boundary β€” 4 Q πŸ’  Place IO Pads β€” 4 Q πŸ’  Place Macros β€” 4 Q πŸ’  Macro Clustering β€” 4 Q πŸ’  Flyline Analysis β€” 4 Q πŸ’  Macro Optimization β€” 4 Q πŸ’  Channel Spacing β€” 4 Q πŸ’  Halo Creation β€” 4 Q πŸ’  Routing Channel Creation β€” 4 Q πŸ’  Placement Blockages β€” 4 Q πŸ’  Check Congestion β€” 4 Q πŸ’  Check Macro Overlaps β€” 4 Q πŸ’  Floorplan Verification β€” 4 Q πŸ’  Power Planning β€” 4 Q 🏒 Target Companies: NVIDIA Β· Intel Β· Google Β· Qualcomm Β· AMD Β· Apple Β· Broadcom Β· STMicroelectronics Β· Cadence Β· Synopsys Β· Samsung Β· TSMC #VLSI #PhysicalDesign #Floorplanning #VLSIInterview #ChipDesign #VLSIEDA #STA #PowerPlanning #Semiconductor #InterviewPrep #ECEStudents #ECEGraduate #EngineeringStudents #JobPreparation #PlacementPrep #NVIDIA #Intel #Google #Qualcomm #AMD #Apple #NowHiring #FusionCompiler #Cadence #Synopsys

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