Post by Atlas Engineering S.R.L.

Navigating blind is not an option. When GNSS signals are jammed or denied, autonomous systems must immediately rely on visual and inertial data to maintain their trajectory. But traditional hardware architectures—cobbling together GPUs, external sensor interfaces, and external memory banks—create unpredictable latency and drain battery life. If your drone or rover has to buffer massive batches of image data to external memory before the processor can even look at it, you are already losing precious reaction time. In this latest article, we break down how to solve this bottleneck at the silicon level. At Atlas, we build dedicated processing architectures and application stacks that eliminate the bloat, integrating the entire pipeline onto a highly efficient, single-board architecture. Here is what a deeply integrated, hardware-level approach unlocks for autonomous applications: - True GNSS-Denied Navigation: This frontend pipeline lays the groundwork for Talos, our fault-tolerant Visual-Inertial Navigation stack designed to keep systems on track even in heavily jammed or GNSS-denied environments. - Mission-Critical Reliability: By implementing the vision pipeline directly on the FPGA fabric, we process images on the fly straight from the sensor. No memory bottlenecks or unpredictable slowdowns—just deterministic execution with latency as low as 0.7 to 15 milliseconds. - Extreme Low Power: A standard embedded GPU might pull ~15W to process complex video streams. Our dedicated vision pipeline runs on just ~0.1W. Even when coupled with a 4-core RISC-V processor handling software orchestration, the entire system draws only 3W. - Single System-on-Chip (SoC): Instead of patching together discrete chips to deal with sensors, memory, and acceleration, we handle MIPI interfacing, heavy visual computation and software logic entirely on a single PolarFire SoC. #AutonomousSystems #EdgeComputing #Robotics #GNSSDenied #FPGA #SystemOnChip #EmbeddedSystems #ComputerVision