Seoul
Join Seoul National University Deep Learning Lab (DLLab) and LLM Core AI to build the future of cyber-secure ASIC chips, hardware-based trust, SDKs, and efficient AI systems.
We are recruiting exceptional internship candidates from French Grandes Écoles and other top engineering schools to work on next-generation cyber security ASIC design, GDSII tape-out, hardware/software co-design, and BitNet soft-computing optimization.
This internship focuses on cyber security hardware, ASIC chip design, GDSII tape-out, SDK development after ASIC design, and Soft Computing optimization methods for BitNet.
Prior knowledge of cyber security ASICs, GDSII tape-out, or BitNet is not required. Strong fundamentals, curiosity, and the ability to learn quickly are more important.
Key topics include:
• Cyber Security ASIC chip design
• Firmware verification engine
• Secure boot and hardware root-of-trust concepts
• Lightweight cryptographic hardware modules
• Hash, authentication, and integrity-checking engines
• RTL design using Verilog or SystemVerilog
• ASIC-oriented architecture exploration
• GDSII tape-out preparation
• SDK development for ASIC testing and deployment
• C/C++ and Python-based hardware/software interface development
• Simulation, testbench, and verification methodology
• BitNet algorithm research
• Soft Computing optimization for ternary neural networks
• Gradient-free and derivative-free optimization methods
• Hardware-aware optimization for low-power AI inference
Cyber Security ASIC research explores how security functions such as firmware verification, secure boot, authentication, integrity checking, and lightweight cryptographic primitives can be implemented directly in hardware.
The goal is to build a trusted hardware foundation for secure embedded systems, AI accelerators, and future sovereign AI infrastructure.
ASIC design and GDSII tape-out focus on the full path from algorithm and architecture to RTL, simulation, synthesis, place-and-route, verification, and final layout generation.
Interns will gain practical exposure to how a security or AI function becomes a real chip.
SDK development focuses on building the software layer required to test, control, and use the ASIC.
This may include C/C++ or Python APIs, test-vector generation tools, simulation interfaces, host-side control software, and documentation for future users of the chip.
BitNet Soft Computing optimization explores new ways to optimize neural networks whose weights are represented with extremely low precision, such as {-1, 0, +1}.
Instead of relying only on conventional gradient-based training, this research investigates Soft Computing, gradient-free optimization, and hardware-aware methods for efficient AI inference.
Together, these topics address an important future direction: secure, efficient, and hardware-grounded AI systems.
Who should apply:
• Students or recent graduates from French Grandes Écoles or other top engineering schools
• Strong background in mathematics, computer science, electrical engineering, cyber security, computer engineering, or applied AI
• Strong programming ability in C/C++ and/or Python
• Interest in cyber security, embedded systems, FPGA/ASIC, digital logic, computer architecture, AI accelerators, SDKs, or optimization
• Experience with Verilog, SystemVerilog, VHDL, FPGA, ASIC design, cryptography, or embedded systems is helpful but not mandatory
• Fluent English required; Korean is not required
Current Visiting Researchers for Internship:
https://dllab.snu.ac.kr/
Duration:
5 to 6 months
Location:
Seoul National University, Seoul, Republic of Korea
Workplace type:
On-site or hybrid depending on visa and project arrangement
Compensation and visa:
Two possible tracks are available.
Track A: D-2-5 Research Student Visa
• Duration: 5–6 months
• Compensation: Unpaid
• Faster administrative processing
• Visa inquiry: [email protected]
Track B: D-2-6 Exchange Student Visa
• Duration: Minimum 6 months
• Compensation: May be supported through available SNU research budget
• Requires formal Certificate of Admission from SNU OIA
• Applicants should prepare at least 5 months in advance
• Visa inquiry: [email protected]
Scholarship opportunities are strongly encouraged, including Eiffel Excellence Scholarship, Erasmus+ ICM, Île-de-France Mobility Grants, and school-based research fellowships.
Benefits:
• Work at Seoul National University, Korea’s leading university
• Join a lab with a long history of hosting French Grandes Écoles interns
• Gain hands-on experience in cyber security ASIC and AI semiconductor research
• Learn the full path from algorithm and architecture to RTL, ASIC design flow, GDSII tape-out, and SDK development
• Work at the intersection of cyber security, embedded systems, ASIC chips, SDKs, BitNet, and startup innovation
• Strong interns may have future opportunities to collaborate with or join LLM Core AI
Hiring process:
How to apply:
Please send the following documents in English to:
Required documents:
• CV / Resume
• Academic transcript
• GitHub profile, if available
• Concours or entrance exam results, if applicable
• Statement of Purpose explaining your background, technical interests, and preferred research direction
Preferred research direction in your Statement of Purpose:
Email subject:
SNU DLLab / LLM Core AI Cyber Security ASIC Internship [Name] - [School] - [BS/MS] - [Available Period]
Applicant privacy:
Application materials will be used only for internship evaluation, interview coordination, and SNU administrative processing.
Documents will not be shared externally without the applicant’s consent.
We are not simply looking for interns.
We are looking for future secure AI builders who want to help create the next hardware and software foundation for efficient, trustworthy, and sovereign AI.