Canada
I am a Senior Validation and Verification Engineer at Synopsys with a PhD in Electrical and Computer Engineering from the University of Waterloo. I have experience in mixed-signal and high-speed interface validation, currently working on SerDes IP characterization and debug for E224G and E112G designs. My work involves system-level analysis, validation flows, and collaboration across design and modeling teams. My doctoral research focused on resistive memory (RRAM), spanning device characterization, circuit-level behavior, and algorithm-aware modeling. I have also developed PyTorch-based simulations to explore hardware-algorithm co-design, including in-memory computing and reservoir computing. I am motivated by roles that require strong system understanding, cross-domain thinking, and close interaction between hardware and software.
Assessed assignments and provided feedback to enhance student learning outcomes in Physics and Models of Semiconductor Devices and Characterization of Nanomaterials courses.