Yash Verma

Senior Design Engineer at Vervesemi Microelectronics

Ghaziabad, Uttar Pradesh, India

About

I’m a VLSI Engineer with strong experience in analog design and ASIC/SoC implementation. I enjoy solving complex design challenges, optimizing performance, and turning specifications into reliable silicon. Beyond work, I’m passionate about traveling and adventure—exploring new places, cultures, and experiences. I believe curiosity drives both great engineering and great journeys, and I bring that same curiosity into my work by continuously learning and adapting to new technologies. Always open to collaborating on innovative projects and connecting with like-minded professionals

Experience

  • Vervesemi (4 yrs 3 mos)
    • Senior Analog Design Engineer
      Dec 2025 - Present · 8 mos

    • Analog Design engineer 2
      Aug 2024 - Jan 2026 · 1 yr 6 mos

    • Analog Design Engineer
      Aug 2022 - Dec 2024 · 2 yrs 5 mos

  • ASIC design and layout training at PinE Training Academy of VLSI & Embedded
    Apr 2021 - Aug 2022 · 1 yr 5 mos

  • Intern at Aimil Ltd.
    Jan 2021 - May 2021 · 5 mos