Yang Zhan

Sr Engineering Manager

Xuhui District, Shanghai, China

About

***Hiring Engineering manager, Sr platform validation architect, validation domain and debug leads for server platform. Contact me if have interests!!!*** Leading a team with close to 60 talent software engineers focus on Intel Platform Update, Power and Performance, Network Platforms validation. ~20 years engineering experience around server and server platform technologies with passions in problem solving and growing people. Spend spare time on reading books, writing essay, and run in Gym.

Experience

  • Intel Corporation (20 yrs 3 mos)
    • Sr Engineering Manager - Validation, Debug and PnP
      Aug 2021 - Present · 5 yrs

      (Close to 60 engineers) Head of SoC platform validation & integration team of shanghai, report to a global leader based on US. Three major functions reported to me, including Intel platform update (IPU), Platform Power and Performance (PnP), and Network Platform Integration.

    • Engineering Manager - Platform Power & Performance
      Mar 2018 - Aug 2021 · 3 yrs 6 mos

      (10+ engineers) Manage platform power & performance team, owns XEON-SP platform power & performance validation and debug. Since onboard, reshuffled team scope from project wise driven to domain driven in 6 months, leaping ahead of environment change. Invest on cutting-edge workload capability build up including AI, SGX, motivated team to adopt full stack view of validation, found and debug performance/power issues from upper-layer workloads to bottom firmware/silicon.

    • Platform Integration & Validation Architect
      May 2017 - Feb 2018 · 10 mos

      Architecting Platform integration coverage content, and solve key execution and technical issues.

  • MP SW Testing Engineer (Contractor) at Nokia
    Oct 2004 - Apr 2006 · 1 yr 7 mos

    Debug engineer for cell phone reset error triage, field return phone failure analysis and root cause. Validate performance variations across software releases; User-based mobile phone testing and debug.

  • HPC Engineer at INSPUR
    Jul 2002 - Sep 2004 · 2 yrs 3 mos

    Designed TS10K 1st gen HPC product of Inspur. Implement E2E solutions to HPC customers. Expertise in high-speed network InfiniBand, E2E HPC cross-stack build and debug, built as large as 256-nodes cluster, named as top500 server in the world.