William Zhu
EE/CS at Stanford
San Francisco Bay Area
Experience
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ASIC Design Engineering Intern at NVIDIA
Jun 2026 - Present · 1 mo
Interconnect
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Stanford University (2 yrs 3 mos)
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Undergraduate Research
Sep 2025 - Present · 10 mos
Formal methods for speculative contract synthesis 📝
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Teaching Assistant
Sep 2024 - Mar 2026 · 1 yr 7 mos
Teaching Assistant for EE 108: Digital System Design and EE 180: Digital Systems Architecture
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Undergraduate Research
Apr 2024 - Jun 2025 · 1 yr 3 mos
RTL design generation and optimization using LLMs 💻
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RTL Design Intern at Arm
Jun 2025 - Sep 2025 · 4 mos
Cache-coherent interconnect
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EDA Software Intern at Silimate (YC S23)
Mar 2025 - Jun 2025 · 4 mos
AI tools for chip design 🤖
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FPGA Engineer Intern at Seagate Technology
Jul 2024 - Sep 2024 · 3 mos
Designed and developed a flash memory controller ⚡️