Tualatin, Oregon, United States
A Ph.D. candidate and accomplished semiconductor deposition/epi-growth engineer with device fabrication experience seeking an advanced role in thin film deposition/growth, lithography, or process integration. Extensive 4+ years of hands-on expertise in MBE epitaxy, material characterization, III-V MBE maintenance, and UHV processes. Proved success in experiments design, execution, and data management. Author and co-author of scientific research papers published in peer reviewed journals.
CSBG Engineering, Deposition Group
Successfully completed the following projects- Epitaxial Growth/ Thin Film Deposition: - Epitaxial growth of heterostructures and quantum wells of GeSn, GeC, and GeSn(C) on GaAs and Ge substrates using molecular beam epitaxy (MBE). - Optimized critical growth parameters and established precise control for repeatability. - Demonstrated process improvements in native oxide desorption from the wafers, resulting in a 66% improvement in time. - Systematically studied the influences of Carbon Tetrabromide (CBr4) and Tin (Sn) on GeSnC growth. - Increased the atomic percentages of Sn in GeSnC growth by employing innovative techniques. Material Characterization: - Grown materials demonstrated atomically flat surfaces, verified by AFM and RHEED. - Analyzed Tin (Sn) and C defects within the material using SEM, EDAX, grazing XRD, and Raman. - Identified bulk and surface defects using SEM backscattered and secondary electrons. - Quantified crystal quality, strain relaxation, and film thickness using XRD and XRR. - Determined absolute compositions of the alloy using XPS and RBS with high precision. Device fabrication: MOS Capacitor, TLM structure, and waveguides. - Optimized lithography processes: photoresist thickness, exposure time, and etch rate. - Fabricated different sizes of Si MOS cap devices using UV lithography and chemical etch/liftoff. - Deposited high-quality Al2O3 as gate oxide on Si using Atomic Layer Deposition. - Fabricated TLM structures and demonstrated low resistance Al contacts on GeC, and GeSnC. - Process developed for GeC and GeSnC waveguide fabrication. - Wet and dry etching was performed for vertical features. Optical and Electrical characterization - Demonstrated direct band edge absorption and achieved the first reported light emission (PL) in GeSnC. - Demonstrated low Aluminum contact (TLM structure) and sheet resistance (four-point probe) in GeSnC. - Performed C-V measurement to quantify dielectric constant in Si MOS Cap devices.
Teaching: 1. Semiconductor Device Physics/Solid State Physics 2. CMOS Fabrication 3. Electronics Device & Circuit Grants and Funding: 1. Implementation of submarine robot for underwater navigation and communication. Funding Agency: University Research Center, SUST Thesis supervision: 1. Low-Cost Underwater Wireless Communication System Development Using Piezo-Ceramic Transducer, 2019 1st International Conference on Advances in Science, Engineering and Robotics Technology (ICASERT), May 5, 2019. DOI:10.1109/ICASERT.2019.8934646 2. Impact of Channel Length Reduction and Doping Variation on Multigate FinFETsImpact of Channel Length Reduction and Doping Variation on Multigate FinFETs, 2018 International Conference on Advancement in Electrical and Electronic Engineering (ICAEEE), Nov 24, 2018. DOI: 1109/ICAEEE.2018.8642981.
Teaching: 1. Electrical circuit analysis 2. Digital Electronics 3. Electrical machine 4. Power system generation and distribution Grants and Funding: 1. Total Automation System of Shahjalal University of Science and Technology (SUST) using RF ID. Funding Agency: University Research Center, SUST