Bengaluru, Karnataka, India
Post-silicon validation constitutes the phase after the chip is manufactured internally & before it is officially released to the customer. Post-silicon validation is a critical phase in product life cycle and is targeted towards finding silicon bugs through internal validation so that the chip that is released to customers is clean & bug free. This has a multiple quarter cycle depending on the complexity of the design & the stakes attached. My role is to identify the key power/perf bottlenecks, define test coverage around them & debug to mitigate the same on silicon. This includes process vector optimizations like Cdyn & leakage for active & leakage power as well as validating the power-performance features for feature score card analysis targeted towards present & N+1/N+2 roadmap; Also includes benchmarking industry standard workloads for competitive analysis.