Santa Clara, California, United States
I am co-founder and Chief Hardware Architect at Cerebras Systems, where we are building the world's first and only wafer-scale processor, with the system and software to change the landscape of compute for AI. Prior to co-founding Cerebras, I was Chief Hardware Architect at SeaMicro (acquired by AMD). I was responsible for four generations of the IO virtualization fabric ASICs and system architecture. The fabric architecture brought together compute, networking, and storage in a single flexible efficient system. Post-acquisition, I was Chief Architect for the Data Center Server Solutions business unit at AMD. Prior to SeaMicro, I was a microprocessor architect at AMD in the advanced architecture group.
I was an AMD Fellow and the Chief Architect of the Data Center Server Solutions business unit (formerly SeaMicro). I was responsible for the architecture of the SeaMicro family of fabric compute systems which brought together compute, networking, and storage in a single converged platform. The core of the SeaMicro architecture is the IO virtualization fabric that enables extremely high efficiency, density, and flexibility.
I was one of the first engineers in the founding engineering team responsible for designing and bringing to market the first SeaMicro fabric compute system. I was a lead architect and engineer for several generations of systems and fabric ASICs. SeaMicro was acquired by AMD in April 2012.
I was a member of the architecture team responsible for the brand new high performance Bulldozer processor core. I was responsible for design and micro-architecture of the instruction decode unit and out-of-order execution engine.
I was an engineering intern in the summers of 2001 and 2002. I was in the microprocessor design group working on clock tree design and timing/layout methodology for a next generation processor.