Naples, Campania, Italy
I hold the position of research fellow (RTDa L. 240/2010) for Sector 09/H1 Information Processing Systems at the Department of Electrical Engineering and Information Technology (DIETI), University of Naples Federico II. My research activities pertain to the design of high-performance computing systems while exploiting the approximate-computing design paradigm, and safety-critical systems, mostly for the railway domain. Designing high-performance computing systems while exploiting the approximate computing is my main research topic. I am focusing mostly on machine-learning and artificial intelligence applications. Concerning safety-critical applications for the railway domain, I am involved in multiple research activities pertaining to the Department of Electrical and Information Technologies (DIETI) of the University of Naples Federico II, the Consorzio Interuniversitario Nazionale per l'Informatica (CINI) and Rete Ferroviaria Italiana S.p.a. - Gruppo delle Ferrovie dello Stato (RFI). Despite these topics seem quite far away from each other, the know-how acquired while working on approximate computing is extremely valuable when safety critical systems are considered. Indeed, error and fault resiliency is a must while designing and testing both approximate or safety-critical systems.
I am involved in several research activities, including the design of computing systems while exploiting the approximate-computing design paradigm, and the design of safety-critical applications for the railway domain.
Concerning activities pursued during the doctoral studies, I was involved in quite diversified researches, including the design of computing systems while exploiting the approximate-computing design paradigm and the design of safety-critical applications for the railway domain. The design of computing systems while exploiting the approximate-computing design paradigm was my main research topic. In brief, it involves deliberately introducing approximation at specific points in an application in order to achieve performance benefits, e.g., increased computational capabilities in software implementations or reduced overhead for hardware implementations. My research activities aim at defining a generic, automatic and application-independent methodology for the design of efficient computing systems, addressing challenges this paradigm pose to the designer. The methodology resulting from the research work, which exploits abstract representations of the algorithms and applications to be approximated and multi-objective optimization, has been applied to several applications, belonging to different domains, including image-processing and machine-learning. The design of such systems has genuinely benefited from the methodology, allowing for a significant improvement in the efficiency of these systems, while still maintaining the high quality of the results. Concerning safety-critical applications for the railway domain, I was involved in research activities pertaining to the Department of Electrical and Information Technologies (DIETI) of the University of Naples Federico II, the Consorzio Interuniversitario Nazionale per l'Informatica (CINI) and Rete Ferroviaria Italiana S.p.a. - Gruppo delle Ferrovie dello Stato (RFI) since the internship-period preceding my Master-degree thesis. Over time, I was involved in many activities, even overlapping in time, with different roles: from technical support, to management and organization of research activities.
I hae been an invited researcher at Institute Nanotechnology De Lyon (INL), site de l’École Centrale de Lyon (ECL) - Université de Lyon/Centre National de la Recherche Scientifique (CNRS), as an expert in the field of design and test of integrated digital circuits. During this timeframe, he was involved in research activities related to the “Approximating Deep Learning Accelerators (AdequateDL)” research project (ANR-18-CE23- 0012), under the Electronic working group of INL. In particular, in collaboration with my research team, he led research activities concerning the development of low power digital circuits exploiting the approximate computing paradigm, and testing methodologies for integrated circuit to be used in critical applications.
Thesis Title: A Configurable Middleware Propotype -- in the Railway Domain -- for Fault Detection and Reliable Communication The thesis was carried out as part of a joint project between the University of Naples Federico II and Rete Ferroviaria Italiana S.p.a. -- Gruppo delle Ferrovie dello Stato -- and dealt with the design of two-out-of-two redundant real-time systems and reliable communications for the railway domain.