Hillsboro, Oregon, United States
I have a Master of Science in Computer Engineering from University of Massachusetts Lowell, where I completed a thesis on G-band double-balanced mixer in tandem with high-speed ADC for baseband signal processing for RF communication systems. I also have a Bachelor of Technology in Electronics and Communications from Jawaharlal Nehru Technological University. I have published a paper on a modified SHA-192 hash function for cryptology in an international journal. I am passionate about applying my knowledge and skills in computer engineering, electronics, and communications to develop innovative and high-quality products that enhance the performance and functionality of wireless technologies. I enjoy collaborating with other engineers and researchers to solve challenging problems and learn new techniques. I am always eager to expand my expertise and explore new domains in the field of mixed signal and RF engineering.
-- Trained students in a Clean-room environment (Class 100) for Semiconductor processing steps like Thermal oxidation, Photolithography, Diffusion, Etching, and Metallization -- Trained students to use and build basic circuits in Cadence. Training also includes efficient floor planning for layout design, and simulating results in different operating conditions like temperature.
-- A part of Qualcomm’s Central Engineering team focusing on Mixed Signal IP development for mobile SoC and Wireless Multimode Modems. -- Contributed to the silicon bring-up and characterization of a range of IPs, including Comparators, PLLs, and various sensors embedded within a Secure Processor (Voltage, Temperature, and Frequency), as well as ADCs. -- As IP owner, responsible for coordinating with Design, ATE and Systems team to ensure successful and yield-optimal production. Responsibilities also include bench SW development using LabVIEW and data analysis. -- Achieved a 3% yield improvement on a 4nm Technology Node through IP optimization. Identify marginalities and negotiate with the Systems team for spec relaxation. -- Responsible for cost optimization opportunities by identifying yield issues and excessive production tests resulting in Yield improvement and TTR. -- Spearheaded the design and successful implementation of a cutting-edge Python-based data processing tool capable of handling diverse data sets, including but not limited to ADC calibration data and power consumption metrics. This versatile tool addressed the unique needs of various data types, accommodating the intricacies of different hardware components and their respective performance parameters. As a result, it played a pivotal role in optimizing the team's workflow. This achievement led to a substantial 35% increase in operational efficiency, significantly reducing bottlenecks and accelerating project timelines. -- Automated a variety of test instruments, including Oscilloscopes, Switched Power Supplies, Multimeters, clock boards, JTAG, and Signal Analyzers, to streamline bench testing processes and seamlessly integrate with NI TestStand, effectively reducing testing time.
-- A part of Qualcomm’s Central Engineering team focusing on Mixed Signal IP development for mobile SoC and Wireless Multimode Modems. -- Contributed to the silicon bring-up and characterization of a range of IPs, including Comparators, PLLs, and various sensors embedded within a Secure Processor (Voltage, Temperature, and Frequency), as well as ADCs. -- As IP owner, responsible for coordinating with Design, ATE and Systems team to ensure successful and yield-optimal production. Responsibilities also include bench SW development using LabVIEW and data analysis. -- Achieved a 3% yield improvement on a 4nm Technology Node through IP optimization. Identify marginalities and negotiate with the Systems team for spec relaxation. -- Responsible for cost optimization opportunities by identifying yield issues and excessive production tests resulting in Yield improvement and TTR. -- Spearheaded the design and successful implementation of a cutting-edge Python-based data processing tool capable of handling diverse data sets, including but not limited to ADC calibration data and power consumption metrics. This versatile tool addressed the unique needs of various data types, accommodating the intricacies of different hardware components and their respective performance parameters. As a result, it played a pivotal role in optimizing the team's workflow. This achievement led to a substantial 35% increase in operational efficiency, significantly reducing bottlenecks and accelerating project timelines. -- Automated a variety of test instruments, including Oscilloscopes, Switched Power Supplies, Multimeters, clock boards, JTAG, and Signal Analyzers, to streamline bench testing processes and seamlessly integrate with NI TestStand, effectively reducing testing time.