Sai Srujana Yalamareddy

About

Graduated in Computer Engineering from University of Cincinnati , Ohio specialized in the areas of Digital VLSI design Skills: Hardware Description languages - system Verilog,VHDL Engineering Tools – Spyglass LINT CDC, RDC, FISHTAIL constraint verification, Primetime, Design Compiler Programming Languages – C, C++,Perl

Experience

• Member of Technical Staff at Etched
  Apr 2025 - Present · 1 yr 4 mos

• Infinera (6 yrs 4 mos)
  • Sr ASIC Design Engineer
    May 2022 - Apr 2025 · 3 yrs

  • ASIC Design Engineer
    May 2019 - May 2022 · 3 yrs 1 mo

  • ASIC Design Engineer Intern
    Jan 2019 - Apr 2019 · 4 mos

• ASIC Design Intern at Infinera
  Jun 2018 - Aug 2018 · 3 mos

• Intern at Electronics Corporation of India Limited (ECIL), Department of Atomic Energy, Government of India.
  Jun 2016 - Jun 2016 · 1 mo

• Internship at Bharat Heavy Electricals Limited
  Jun 2015 - Jun 2015 · 1 mo