Austin, Texas, United States
Physical Design Engineer at Apple helping build the next generation of low power and high performance GPUs.
Constructing the next generation of Apple silicon Developing data collection and analysis tools Worked on blocks with multiple power domains (including switched) and multiple clocks Work with micro-architects to enable PPA improvements at the IP level, including working with them to enable power-gating.
Collecting various routing metrics. Using collected metrics to optimize routing for power through linear optimization.
Improved clock gating efficiency. Experiment with collapsible pipelines. Manage I/O with other units and high level connectivity within the team's own unit
Optimized large lookup tables to reduce area up to 60%. Worked in SystemVerilog and Embedded Ruby. Coordinated with synthesis to find best ways to reduce area.
Wrote and tested CPU Hotplug code to comply with the ARM PSCI specification. Managed cache coherency in firmware when cores come online and go offline