Robert Bao

MTS @ Etched | MS ECE @ UIUC

United States

About

Working at Etched. Previously did MS at UIUC where I researched emerging technologies in computer architecture (advised by Professor Rakesh Kumar).

Experience

  • Member of Technical Staff at Etched
    May 2026 - Present · 3 mos

    perf modeling

  • PhD Admit at Stanford University
    Feb 2026 - May 2026 · 4 mos

    attended admit weekend

  • Illinois ECE (1 yr 10 mos)
    • Research Assistant
      Aug 2024 - May 2026 · 1 yr 10 mos

      SiPh and 🧇scale - Accelerating FPGA-based Prototyping Using Waferscale Integration (DAC WIP 2026) - Waferscale Silicon Photonics Systems: A Cost-Benefit Analysis and Optimization (ICCAD 2025)

    • Teaching Assistant
      Aug 2024 - May 2026 · 1 yr 10 mos

      ECE 411 - Computer Organization and Design (FA25, SP26) ECE 313 - Probability with Engineering Applications (SU25) ECE 385 - Digital Systems Lab (FA24)

  • Pre-Silicon Verif Intern at IBM
    May 2024 - Aug 2024 · 4 mos

    scripting

  • Course Assistant at Illinois ECE
    Jan 2022 - May 2024 · 2 yrs 5 mos

    ECE 220 - Computer Systems & Programming (SP24) ECE 385 - Digital Systems Laboratory (FA23,SP24) ECE 110 - Intro to Electronics (SP22-SP23) ECE 210 - Analog Signal Processing (FA22)