Sunnyvale, California, United States
Sr. Fellow SoC Architect experienced with Mixed Signal high volume Consumer Digital TV (DTV), Set-top Box (STB) SoCs and Standard Cell Digital Telecommunications ASICs, Proven Leadership on 9 platform product SoCs and many derivatives. Experienced with x86 and ARM processors, GPU cores, audio/video codecs, security, digital and analogue video/audio acquisition, post processing and rendering IPs. Work closely with BU marketing team on product roadmap definitions and program schedule/resource/cost feasibility studies. Lead SoC Architecture team in the product definition, system use case definition and SoC memory subsystem performance analysis. Supported integration, IP development, Emulation and Physical design teams to achieve functional verification coverage, final netlist, timing closure, production test, reliability robustness (ESD/EMC/Latch-up/HTOL) and delivering right first time functional silicon on schedule. Specialties: Lead many make-buy IP studies and worked to co-develop IP or license many 3rd party IPs such as CPUs, GPUs, HDMI, ETHERNET, DP, SATA, USB, PCIe, SDIO and GDDR6/DDR5 PHYs. In addition played key role in due diligence on IP and product roadmaps discussions during Mergers and Acquisitions.
Consumer Systems-on-Chip for Analogue/Digital TV and Set-top box markets.