Rene Haueis

Principal Process Engineer Lithograpy at NXP Semiconductors

Arnhem-Nijmegen Region

About

Specialties: High level of abstraction and analytical skills

Experience

  • NXP Semiconductors (31 yrs 2 mos)
    • Principal Process Engineer Lithography
      Sep 2006 - Present · 19 yrs 10 mos

      - Project leader resist volume reduction. Introduction of RRC coat recipes. - Project leader resist platform consolidation. - Process owner: C75, HVDMOS, ABCD1, EZHV, C200-900, C110/B110 - Member of Lithography Expert Team of NXP fabs

    • Principal Process Engineer Lithography
      May 1995 - Sep 2006 · 11 yrs 5 mos

  • Process Engineer Lithography at Systems on Silicon Manufacturing Company Pte Ltd (SSMC)
    May 2014 - May 2014 · 1 mo

    - Support Qubic 4 TFR transfer.