United States
Experienced semiconductor technology leader with a strong background in advanced CMOS technologies, device modeling, TCAD simulation, compact modeling, and semiconductor research. Over the years, I have led cross-functional engineering and research teams focused on device design, process development, yield analysis, RF characterization, and AI-driven technology evaluation. Skilled in bridging advanced research with practical engineering solutions, with extensive experience supporting next-generation logic and memory technologies. Passionate about innovation, collaboration, and building high-performing engineering teams that drive long-term technology advancement
• Led a multidisciplinary organization responsible for advanced silicon technology research, device modeling, AI-assisted technology evaluation, and next-generation semiconductor architecture exploration supporting NVIDIA’s data center, AI, and accelerated computing platforms. • Directed cross-functional teams of device engineers, modeling specialists, circuit architects, and research scientists to evaluate emerging process technologies across leading foundry ecosystems, including advanced FinFET and Gate-All-Around (GAA) technology nodes. • Established strategic research collaborations with top-tier universities, semiconductor research institutes, and ecosystem partners to accelerate innovation in advanced transistor technologies, silicon scaling, and heterogeneous integration. • Oversaw development of AI-driven modeling and simulation frameworks that significantly improved technology assessment efficiency, enabling faster evaluation of future process technologies and device architectures. • Led advanced silicon feasibility studies supporting next-generation GPU, AI accelerator, networking, and high-performance computing products. • Drove research initiatives in compact modeling, TCAD-based device optimization, variability analysis, reliability assessment, and power-performance-area (PPA) optimization for future technology nodes. • Partnered with executive leadership, architecture teams, and external technology partners to define long-term semiconductor technology roadmaps aligned with NVIDIA’s accelerated computing strategy. • Managed global engineering and research teams across North America and Asia, fostering a culture of innovation, technical excellence, and high-impact execution. Key Focus Areas: Advanced CMOS Technologies | Gate-All-Around (GAA) Devices | Device Modeling | TCAD Simulation | AI for Semiconductor Research | Advanced Packaging | Heterogeneous Integration | High-Performance Computing | Technology Strategy
Device Lab at Samsung Semiconductor, Inc. (SSI), San Jose, CA 1) Managing device research activities including compact modeling and circuit analysis of advanced logic and memory technologies, TCAD based device design, yield analysis, machine learning algorithm development, etc 2) Coordinating and managing research programs with top university teams
Leading the SPICE modeling and performance evaluation activities for the development of advanced CMOS technology Managing SuVolta's TCAD team for device design and process development of advanced CMOS technology
1) Device modeling Team Lead for advanced bulk CMOS technology in multiple technology nodes 2) RF modeling Team Lead for advanced bulk CMOS technology 3) Statistical modeling (Monte Carlo and fixed corners) of advanced MOSFETs 4) RF characterization and de embedding for advanced RFCMOS and BiCMOS devices 5) Test-site design for advanced CMOS, RFCMOS and BiCMOS technologies 6) Noise modeling of advanced CMOS devices 7) Device and process simulation for advanced CMOS technology