Peter Rickenbach

Computer Engineer

Greater Boston

About

Experienced validator, debugger, and developer looking to leverage existing expertise in software, hardware, and computer architecture while expanding his technical abilities. Interested in both developing new solutions and debugging existing ones. Experienced with full life cycle of microprocessors including pre-silicon development, system power-on, post-silicon validation, silicon debug, and enabling high volume manufacturing. Extensive experience developing software tools for data analysis and test automation as well as low level assembly tests to provide microarchitectural stimulus. Comfortable working in simulation environments as well as physical labs with test equipment.

Experience

  • Engineer at Apple
    Aug 2021 - Present · 5 yrs

  • Debug at Marvell Semiconductor
    Jul 2018 - Aug 2021 · 3 yrs 2 mos

    Define silicon features for debugging critical paths Develop cache resident functional tests for ARM cores Develop tools to automate loading and executing tests in lab environment Develop tools to automate using silicon debug features to isolate critical paths Design and execute experiments to characterize and debug silicon speed

  • Debug at Cavium Inc
    Jan 2017 - Jul 2018 · 1 yr 7 mos

    Define silicon features for debugging critical paths Develop cache resident functional tests for ARM cores Develop tools to automate loading and executing tests in lab environment Develop tools to automate using silicon debug features to isolate critical paths Design and execute experiments to characterize and debug silicon speed

  • Component Debug Engineer at Intel Corporation
    2015 - 2016 · 1 yr

    Debugged silicon sightings on server microprocessors. Developed debug tools and automation.

  • Intel Corporation (9 yrs 1 mo)
    • Software Engineer
      2012 - 2014 · 2 yrs

      Developed validation and manufacturing test content for multiple generations of Xeon and mobile SOC products. Focused on debug and porting of system content to manufacturing testers.

    • System Validation Engineer
      2005 - 2012 · 7 yrs

      Developed and executed post-silicon validation plans for multiple generations of Itanium and Xeon server microprocessors. Developed test automation tools and methods. Developed test content for both systems and manufacturing testers. Debugged silicon sightings and system to tester frequency and voltage miscorrelations.