Noida, Uttar Pradesh, India
I am an R&D Staff Engineer specializing in processor simulation, virtual prototyping, and low-level embedded software systems. Over the past 6+ years, my work has focused on bridging the gap between hardware architecture and software execution by developing high-performance simulation models for complex, automotive-grade, and mobile SoCs. My technical sweet spot lies at the intersection of Hardware-Software Co-Design: SystemC/TLM-2.0 modeling, Instruction Set Architecture (ISA) modeling, and advanced microarchitectural simulation (pipelines, MPU/MMU, caches, and interrupt controllers). I have a proven track record of delivering massive performance gains—frequently achieving 4x-5x simulation speedups—by architecting simulator components with deeply optimized C+ Core Expertise: • Languages & Systems: C, C++ (Performance Profiling & Optimization), Python, Systems Programming • Virtual Prototyping: SystemC, TLM-2.0, Synopsys Virtualizer & Portfolio Advisor, Co-Simulation • Processor Architecture: ISA Modeling, RISC-V, ARM (Cortex-R/M/A), Infineon AURIX/TriCore, Renesas RH850, Microarchitecture (Caches, Pipelines, MMU) • Embedded Platforms: OS Bring-up (Linux Kernel, Android, AUTOSAR), Device Drivers
Own the end-to-end development lifecycle of high-fidelity processor simulation models from architectural specification through to customer release across multiple domains • Processor & ISA Modeling: Architect and implement instruction set architecture (ISA) simulation models, ensuring alignment with core microarchitecture subsystems like pipelines, MPUs/MMUs, caches, and interrupt controllers. • Virtual Platform Integration: Integrate third-party processor cores and digital signal processors (DSPs) into the virtual prototyping ecosystem to expand pre-silicon hardware-software co-design capabilities. • Architectural Analysis & Debugging: Serve as the technical expert to resolve deep architectural bottlenecks, synchronization issues, and hardware-software interface anomalies for global semiconductor clients. • Lifecycle Leadership: Drive cross-functional execution across architecture, software engineering, and QA teams while providing technical guidance to junior engineers in low-level systems programming.
Designed and implemented a telemetry-driven Android malware detection framework utilizing hardware and software system signals for my graduate thesis • Telemetry Pipeline: Built a data-collection infrastructure to extract low-level system features, including memory allocation behavior, CPU performance counters, and network subsystems • Machine Learning: Evaluated and optimized complex classification algorithms to analyze runtime telemetry and classify anomalous system behavior
• Engineered and maintained enterprise software applications in the Life Sciences domain using the .NET/MVC framework. • Built strong fundamentals in production-grade software engineering, rigorous testing discipline, and agile cross-team collaboration.