Prasad Vaidya

Staff Silicon Design Validation Engineer @ Lattice Semiconductors | Ex Micron | Ex Synopsys

India

About

Experience

  • Staff Silicon Design Validation Engineer at Lattice Semiconductor
    Oct 2025 - Present · 9 mos

  • Senior ASIC Design and Validation Engineer at Micron Technology
    Jan 2022 - Sep 2025 · 3 yrs 9 mos

  • Head,Digital Design at Binalog Electronic Design
    Oct 2019 - Dec 2021 · 2 yrs 3 mos

  • Synopsys Inc (2 yrs 11 mos)
    • Electronics R&D Engineer II
      Jan 2018 - Sep 2019 · 1 yr 9 mos

    • Technical Intern
      Nov 2016 - Dec 2017 · 1 yr 2 mos

  • Project Intern at Maven Silicon
    Mar 2016 - Oct 2016 · 8 mos

    Driven By technology and Electronics stuff. Always ready to take new challenges and grow with knowledge. Ready to contribute to Nations development.