Philip Wolfsberger

Technical Lead at DRW

Greater Montreal Metropolitan Area

About

As an innovative and perceptive computer hardware engineer specializing in FPGA architecture and embedded firmware development, I am passionate about the user experience. I strive to develop well-designed products that meet today’s needs but are prepared to evolve with tomorrow’s market. I am constantly seeking a challenging environment that will capitalize on my energy and inventiveness while encouraging ongoing personal growth. Specialties: FPGA design, embedded firmware development, ASIC design, SoC architecture, digital signal processing, high speed digital design, HD and 3D video, PCB design and prototyping, software release management, C/C++, VHDL, SystemVerilog, Xilinx Vivado, Altera/Intel Quartus, Mentor Graphics PADS

Experience

  • Technical Lead, Researcher/FPGA Designer at DRW
    Sep 2018 - Present · 7 yrs 10 mos

  • Emulation Engineer at Intel Corporation
    Sep 2015 - Jul 2018 · 2 yrs 11 mos

    • Designed and developed FPGA emulation platforms used in the verification of Intel's latest ASIC controllers for solid-state drives • Re-targeted complex ASIC designs to FPGAs involving the redesign of clocking and reset networks as well as the implementation of custom physical interfaces • Developed SystemVerilog chip level simulation test benches using assertion based verification, and performed software based verification running on DSMs for embedded CPUs • Collaborated with software and verification teams to develop C++ drivers used in the hardware abstraction layer of the ASIC’s production firmware • Wrote micro architecture specifications for FPGA specific implementations of ASIC physical interfaces

  • Senior Hardware Design Engineer at Evertz
    Aug 2009 - Sep 2015 · 6 yrs 2 mos

    • Developed highly flexible and portable firmware for rapid implementation on a variety of highspeed video and audio processing systems • Designed detailed FPGA architectures focusing on transceiver interfaces for 10 Gb/s Ethernet, DDR3 memory controllers and digital image processing • Implemented standardized communication protocols such as PCIe, EMIF, I2C and RS-232 in firmware and RTL • Drafted complex PCB schematics comprising of multiple SoC devices using PADs Schematic Editor and perform hardware verification on new design prototypes • Collaborated with testing, production and mechanical departments to achieve the highest level of quality for products • Wrote comprehensive test procedures, technical specifications and user manuals for quality assurance technicians and customers

  • IT Applications Associate at Celestica
    2007 - 2008 · 1 yr

    • Performed database and web development tasks as member of software design and development team • Helped develop a customer focused reporting tool for high priority data using the principles of service oriented architecture • Promoted to role of application custodian for proficient work • Led several initiatives focused on team building and department budget reductions under direct supervision of department director

  • Intern at Holonics
    May 2006 - Aug 2006 · 4 mos

    • Performed testing and Java development tasks for a J2EE government banking application • Developed and maintained XSDs for return model XML files; submitted by financial institutions