Barcelona, Catalonia, Spain
Digital Design Engineer, with 14 years experience in the semiconductor industry, 11 of them in ASIC design and verification. Previous experience as Applications Engineer provided valuable knowledge on system design, embedded programming, FPGAs, etc. I also have a strong interest in CAD, love to work on new methodologies, scripts and tools automate stuff
• Design of digital blocks to be used in complex (10M+ gates, mixed-signal, SoC, 0.18um and 65nm) high-speed video processing ICs. • Functional verification at block/chip level. SystemVerilog used to create the harness, test and stimuli needed to debug the logic in isolation. UVM testbenches and testcases to simulate and verify at top level. Analogue models written in SystemC and SV. SVA used to catch potential bugs during the whole verification flow. • Back-end tasks such as synthesis, gate-level simulations, power analysis, timing signoff, etc. • Static and dynamic scan insertion across different core boundaries. Generation and simulation of test patterns (ATPG) • FPGA prototyping and debugging • Extensive utilization of bash, python and TCL scripting to support all the above mentioned tasks. SOS, CVS and GIT used for version control
FPGA programming and Software development Provide customer support to the key customers of our video parts. Create technical documentation and presentations (product Datasheets, user guides, hardware manuals, etc.) for our ASICs. Evaluation, measurement and functional testing of the designed ASIC.