Dhaka, Bangladesh
VLSI Layout Design trainee with hands-on experience in Analog and Digital Layout Design. Skilled in CMOS layout, DRC/LVS verification, routing, and layout optimization using industry-standard EDA tools. Passionate about semiconductor technology and continuously improving practical design skills through projects and training. Currently seeking entry-level opportunities, internships, or trainee roles in VLSI Layout, Analog Layout, and Physical Design.
Learning VLSI IC Design fundamentals with focus on CMOS technology • Working with Cadence Virtuoso for schematic design and simulation • Studying Analog & Digital IC Design concepts (MOSFET, PMOS/NMOS, IV characteristics) • Practicing parametric simulation and device analysis
VLSI IC Design