Michele Sannino

Senior VLSI Designer at IMASENIC

Barcelona, Catalonia, Spain

About

I graduated from Politecnico di Milano with a Master's thesis project that was realised in the CMOS Sensors Design Group of STFC. The project consisted of designing and developing a Sigma-Delta Analog-to-Digital Converter for high speed, low noise image sensors suitable for column parallel readout topology. My contribution includes early feasibility study as well as design and layout of the ADC, until tape-out of the finished test chip. This experience has given me the opportunity to apply all the knowledge acquired during my academic formation while learning about the world of image sensors, as well as gaining practical experience with design tools. I have a passion for math and physics which always induced me to dissect every piece of knowledge: this helps me getting the full picture and understanding in detail how different designs for the same system affect its efficiency and performance. I never take something for granted if I have the time to question it.

Experience

  • IMASENIC (9 yrs 3 mos)
    • Senior VLSI Designer
      Jan 2026 - Present · 7 mos

    • Analog IC Design Engineer
      May 2017 - Present · 9 yrs 3 mos

  • Analog/Sensor DesignEngineer at WEGApixel
    Oct 2016 - Apr 2017 · 7 mos

  • CMOS Student at Rutherford Appleton Laboratory
    Jan 2016 - Jul 2016 · 7 mos

    I fulfilled my Master's Thesis project in the CMOS Sensors Design Group of STFC: the project constisted of designing and developing a Sigma-Delta Analog-to-Digital Converter for high speed, low noise image sensors suitable for column parallel readout topology. My contribution includes early feasibility study as well as design and layout of the ADC, until tape-out of the finished test chip. This experience has given me the opportunity to learn about the world of image sensors as well as to gain practical experience with design tools.