Mike Estrada

Product Design Engineer - Data Center

Berkeley, California, United States

About

Product Design Engineer for Mac Data Center Group. Experience in a diverse set of technical areas including software, control, and mechanical design for computers, particle accelerators/XFELs, Robots/Exoskeletons, and Autonomous Vehicles. Additional experience investigating data-center scale AI acceleration solutions and writing competitive technical analyses to provide business insights. BS ME, UC Berkeley, '19. MS EECS, UC Berkeley, '21.

Experience

  • Product Design Engineer, Data Center at Apple
    Oct 2023 - Present · 2 yrs 9 mos

    • Performed holistic design of Mac desktop computers to the highest aesthetic and technical specifications • Leveraged expertise of cross-functional teams to improve design and perform root-cause failure analyses • Identified and executed cost-down initiatives throughout the design and manufacturing process • Engaged actively with 3rd party vendors to deliver high quality components within expected timelines

  • Control Engineer - Photon Control & Data Systems at SLAC National Accelerator Laboratory
    Feb 2022 - Jul 2023 · 1 yr 6 mos

    • Full-stack, point-of-contact control engineer, Linac Coherent Light Source (LCLS), X-Ray Beam Division (XBD) • Designed hardware and software for LCLS with an eye for optimizing for assembly and usability • Managed cross-functional partners to ensure the optimal functionality of XBD and down-beam teams • Flexibly responded to real-time Failure Analysis needs of $4B lab to enable project goals for 24/7 operation • Sourced labor and components for LCLS both in-house and from 3rd party vendors

  • Graduate Student at UC Berkeley Electrical Engineering & Computer Sciences (EECS)
    Aug 2019 - Apr 2022 · 2 yrs 9 mos

    Graduate Student Researcher in Control, Intelligent Systems, and Robotics focusing on Autonomous control for ground and air vehicles.

  • Market Research Analyst at Intel Corporation
    May 2019 - Aug 2019 · 4 mos

    • Investigated data-center scale, hardware acceleration solutions for AI, including 13 of Intel’s top competitors • Conducted independent research and collaborated with industry experts to forecast the needs of the AI market • Authored and presented 40-page report detailing Intel’s position in AI acceleration and company roadmap

  • JUMP Fellow at UC Berkeley College of Engineering
    Aug 2017 - May 2019 · 1 yr 10 mos

    • Prototyped and developed testbed for exoskeleton control using pneumatic and motorized components • Took ownership of the complete process; design, hardware sourcing, wiring, assembly, and software • Conducted detailed Failure Analysis on custom designed complex electro-mechanical hardware