Ottawa, Ontario, Canada
Silicon Validation & Test Engineer | Memory Interfaces | ATE | Hardware Debug Results-driven electronics professional with hands-on experience in silicon validation, characterization, and test development across advanced memory interfaces including DDR, LPDDR, and HBM PHYs. Skilled in developing robust test methodologies aligned with JEDEC standards, ensuring high-quality silicon performance from bring-up to production. Proven ability to work with ATE systems and evaluation boards for data collection and in-depth analysis, supporting engineering teams in validating silicon against target specifications. Strong background in hardware debugging, board bring-up, and modifications, with a focus on improving validation processes and test infrastructure. Experienced in lab operations management, including equipment handling, resource planning, and Capex/Opex budgeting. Adept at collaborating with cross-functional and global teams, managing timelines, deliverables, and customer expectations. 🔧 Key strengths include: • Silicon test plan development & JEDEC compliance • ATE-based data collection and analysis • Memory protocols: DDR, LPDDR, HBM PHY • Board bring-up, rework, and hardware debugging • Test hardware optimization & process improvement • Customer engagement (pre-sale & post-sale support) • TCVP audit participation and validation lifecycle management Passionate about delivering reliable silicon solutions while continuously improving validation efficiency and hardware performance.
• Developed silicon test methodologies and defined validation plans in compliance with JEDEC specifications • Worked across multiple memory protocols including DDR, LPDDR, and HBM PHY product lines • Collected and analyzed silicon characterization data using ATE systems and evaluation boards • Defined test requirements to validate silicon performance against target specifications • Contributed to continuous improvement of validation processes and test hardware efficiency • Performed board bring-up, hardware debugging, and modifications including rework • Managed lab operations including equipment, inventory, and Capex/Opex planning • Collaborated with global teams and clients to manage SOW, timelines, and deliverables • Provided hardware support to internal teams and external customers • Participated in Test Chip Validation Process (TCVP) audits, ensuring milestone and timeline adherence • Supported pre-sales and post-sales activities, enhancing customer experience and technical delivery
•Traveled to client sites to complete repairs and calibrations. •Completed work in compliance with applicable safety and electrical code requirements. •Calibrated all the electrical instruments used in process industries such as Safety Valves, Transmitters, RTD, Thermocouple etc. •Deals with all the Lab Equipment’s such as Oscilloscope, Multimeter, Power Supplies and many more.