Gilbert, Arizona, United States
Experienced engineer in the semiconductor industry with skills in testing, manufacturing development, quality, and problem solving. A positive, flexible professional with the ability to provide quality work, develop improved methods, and encourage team effort. Consistently provides mentoring and leadership to develop and increase the learning and productivity of fellow team members.
Responsible for all audio new product introduction, coverage, and test time reductions. Worked with the production test team to improve low-yield tests, transfer test programs, and train sustaining engineers to take over test program responsibility. Implemented SCAN, MBIST, and JTAG patterns, including diagnostic and stress vectors. • Audio Test Lead – Worked with Design, Validation, and Firmware groups to test ADCs/DACs utilizing BIST code running on the DSP processors. Utilized an external codec to process mic and speaker data in a loopback configuration. • Developed audio test program flows to push tester performance limits for audio limits (SNR, THD, offsets). • Generated high and low-level test plans and reviewed them with Design and Validation to ensure proper coverage. • Worked closely with the Test Development team to implement coding standards and revision control processes. • Collaborated with the Test Development team to design and verify ATE load boards and probe cards for audio testing.
• Worked with production test team to improve low yield tests, transfer test programs and train engineers to take over test program responsibility. • Implement SCAN, MBIST, and JTAG patterns including diagnostic and stress vectors
Product responsibilities for advanced technology processors, including working with manufacturing subcontractors, designing reliability and test hardware, packaging, and ATE implementation of SCAN, BIST, and functional patterns. • Worked closely with the failure analysis team to find the root cause of highly accelerated stress failures. • Defined and executed qualification plan, budget, and schedule to meet demanding time to market requirements. • Collaborated with offshore assembly subcontractor to assemble flip chip devices used for qualifications and customer samples. Met weekly to closely monitor substrate quantities, wafer availability, and assembly schedules to ensure customer and internal commitments were met. • Debugged test program issues and reviewed test programs to ensure quality before offshore release. • Performed correlations between ATE and development systems to verify specification parameters such as power consumption and minimum operating frequency.