Marek Liska

Principal IC Verification Engineer at Infineon

Villach, Carinthia, Austria

About

Experience

  • Principal IC Design Verification Engineer at Infineon Technologies
    Jul 2024 - Present · 2 yrs

  • Principal IC Design Engineer at MaxLinear
    Aug 2020 - Mar 2024 · 3 yrs 8 mos

  • Staff IC Design Engineer at Intel Corporation
    Apr 2015 - Aug 2020 · 5 yrs 5 mos

    Connected Home Division (CHD)

  • Staff IC Design Engineer at Lantiq
    Oct 2012 - Apr 2015 · 2 yrs 7 mos

    Mixed Signal System Engineering

  • IC Design Engineer at ST-Ericsson
    Feb 2009 - Oct 2012 · 3 yrs 9 mos