Greater Munich Metropolitan Area
- Certified Project Manager IPMA Level C - Program Manager and Project Manager experience on software development projects for Internet applications, with focus on java-based content management systems (CMS). Specialist in the definition and roll-out of project managements methods and quality assurance best practices. - Certified Team Manager : "Licence 2 Lead" sucessfully completed (German TÜV certified development training for professional Team Managers) - 10+ years experience in Semiconductor Companies in the field of Design Automation for IC design, with particular focus on Flash Memories. - Deep knowledge of state-of-the-art CAD tools and EDA flows for front-end design of ICs, including IC design framework setup and maintanence, schematic/layout entry, layout automation, analog accurate spice simulation, turbo-spice full-chip verification, digital simulation, layout verification and finishing, post-layout parasitic extraction and verification, database management, UNIX environment and scripting, PERL and SKILL scripting. - Excellent verbal and written communication skill, proficient written and spoken English and Spanish, very good written and spoken German, Italian native speaker. Specialties: Highly motivated Program and Project Manager with solid technical and managerial knowledge and experience, specialized in the definition and roll-out of project management methods and quality assurance practices. Higly team-work oriented, excellent network of human relationships within the working environment. CAD Application Engineer experience in handling CAD setups, CAD methodology roll-out, EDA tools setup, with particular focus on analog circuitry and memories.
Head of the R&D Excellence Dept. with responsibility for Project Management Office and Quality Management within the Infineon Design Enablement and Services (DES) central R&D function.
Director Project Management with the responsibility to lead complex projects for the provision of Design Systems and basic IPs for semiconductor products targeting a variety of applications, from sensors in the automotive industry to ASICs, radars, digital signal processors, mobile phone components, hearing aids.
Program Manager, Design Systems for the design, simulation and verification of complex VLSI integrated circuits.
Team Manager for the Project Management Team by ARITHNEA GmbH. Responsible for the development program of both project management related technical and soft skills and of the necessary on-field expertise for the team members. Responsible within the team of the on-the-job training schedule for new project managers with particular focus on basic and advanced PM-methods and tools such as project initialisation, project planning (timeline, requirements, costs), resource management, risk analysis, stakeholder analysis, definition of the roles and responasbility in the project organisation, project document management, change request management, knowledge management, communication management, reporting, controlling and successful project finalisation.
Program Management, co-ordination of projects having time and technical dependencies, project and program planning, project controlling and driving with reference to costs and timelines, resource management, release management, change request management, reporting to the company board, coaching to young project managers, introducing quality assurance (QA) concepts and workflows at program level for both deliveries and processes, risk analysis, priority management.
Project Manager for Web-based Content Management System Applications. Certified Project Manager IPMA level C. Responsible for the project from the first feasibilty study and costs evaluation to the final delivery, with particular focus on project plannig, costs estimation, customer care, cost and timeline controlling, reporting to company management, project closure. Introduction of new project management methods in the projekt workflow (change request management, release management). Introduction of quality assurance (QA) methodology for both deliveries and process. Coaching of new project leaders.
- Responsible for the support of the complete CAD flow in the Qimonda Flash Department, including project setup, schematic/layout entry, netlisting, analog accurate and turbospice full-chip simulation, layout automation, layout verification, parasitic extraction, post-lay parasitic extraction and simulation, IRdrop analysis, digital simulation, database management. - Responsible as Technology Node Coordinator for the Flash Technology of the synchronization of the setup deliveries between technology, CAD, and design, triggering changes, defining timelines for the implementation, verifying and installing the Flash CAD setups. - Responsible for the development of basic schematic/symbol libraries for Flash, containing basic transistors, passive elements, custom gates, parasitic models and supply symbols. - Ability to technically support the IC design community from the Design Automation standpoint and interact with external entities like EDA vendors, partner companies, universities, customers. Strongly problem-solving oriented, flexible in evolving technical environments, seeks for innovation through continual personal challenges and self-learning. Proven team-oriented attitude, seeking results for the organization.
Responsible for all the Technical Marketing activities related to Flash Data Management SW Products within the Wireless Division of the Memory Product Group, STM, from the specs definition through market benchmarking activities, customer’s technical inputs, competition monitoring, to pre-sales promotion and post-sales technical support. Among the other responsibilities, technical training to the Flash design community aiming at inter-group/division cross-fertilization on SW Data Management issues, as well as generating, reviewing and releasing official Product User Guides, Technical Documentations, Application Notes and White Papers related to Flash SW Data Management Products for Wireless Applications.
Responsible for CAD Methodologies and Tools in the area of mixed-signal simulations, post-layout parasitic extraction and full-chip verification. Among other responsibilities, benchmarking new Design Automation solutions in terms of flow compatibility and tool efficiency for Flash Memories, rolling out Company CAD methodologies and flows to the Design Community and, if necessary tailoring them onto the specificity of Flash Memories, as well as providing full technical support, high competence consultancy, training, and flow documentation to the Flash Design Community.
Assistant Lecturer in Electronic Devices, Faculty of Engineering, Dept. of Electronics, Laurea Course (MSc) in Electronic Engineering, Politecnico di Bari, Italy, 20-hour course Assistant Lecturer in Electronics I, Faculty of Engineering, Dept. of Electronics, BS Course in Electronics, Politecnico di Bari, Italy, 20-hour course