Antwerp Metropolitan Area
Accomplished research scientist, with >20 years’ experience in Silicon technology and strong history of achievements in the development and exploration of emerging memory concepts (FeRAM, PCRAM, RRAM,...), disseminated in >200 peer-reviewed publications and >25 patents. Experienced people manager, at the lead of a department of >50 researchers, engineers and students. Senior project and program manager, setting scientific and strategic directions, optimizing learning and throughput, managing operations and communication to academic and industrial partners.
Leader of the Compute & Memory Device Department, developing advanced CMOS, beyond CMOS, Quantum, Memory and Storage device technologies
- Leader of development projects targeting Storage Class Memory application: RRAM, VMCO, PCRAM memories, OTS, VCB selectors, 1S1R integration, etc... - Leader of DRAM capacitor development and exploration - Operational manager interfacing process and fabrication units and design teams - Scientific responsible of project strategies and learning, i.e. characterization and modeling approach
- Leader of ~25 memory device researchers, engineers, postdocs and PhD students, active in a broad range of applications in the memory hierarchy: 3D NAND Flash, FeRAM, FeFET, RRAM, PCRAM, Selectors, SOT/STT MRAM, exploratory concepts, DNA, etc. - In charge of the MDD electrical test HW&SW infrastructure operations and developments
- Device expert: designed test structures and developed electrical measurements and models describing device functionality and reliability, with significant contribution in the understanding of PCRAM and RRAM mechanisms - Integration engineer: carried out successful integration of CuTCNQ- and NiO-based memories - Exploratory researcher: investigated original technological concepts and new research paths
Joint Process development with Applied Materials Semiconductors, Leuven - Optimized the deposition (MOCVD, sol-gel) of ferroelectric layers (SBT, BLT) and high-k oxides for capacitor and memory application (FeRAM, FeFET, DRAM) - Identified the effects of the integration steps on electrical properties of ferroelectric memories
- Conducted PhD research on the realization of high capacitances integrated on silicon - Invented and optimized a process allowing the epitaxial growth of perovskite oxides on silicon (PLD of BST/LaSrNiO)