Linda Wang

Sr Product Reliability Manager

San Francisco Bay Area

About

Results-driven professional in new product quality and reliability qualification, NPI product and IC process development, yield improvement, material science, failure analysis and device physics. Proven track record of success in functional and project management. Execution and Operational excellence in semiconductor product IC component, system test, fiber optics, solid state drive companies and start-ups. Specialties: - consumer electronics, PCBA circuit debug and SSD system reliability test, reliability prediction and modeling, RBD, ALT, FTA, MTBF, FIT, Minitab, JMP, Weibull, ReliaSoft - reliability qualification test and failure analysis on semiconductor devices including SoC, ASIC, CMOS, BiCMOS, DMOS, HV device, controller, flash memory, DRAM, SRAM, mixed signal, analog, digital, MEMS, motion sensor, SSD product - material science research background to solve process, package, PCBA, circuit issues - Memory design and characterization on devices physics including EEPROM, NAND NVM flash, SRAM SPICE simulation - MEMS reliability qualification expert, failure analysis and process issue root cause analysis - process integration, yield enhancement, WLR test (NBTI, TDDB, HCI, SM, EM) for foundries - proven record with FA lab setup and engineering team build up - customer interface, customer support and RMA - Certificated Reliability Engineer (CRE) - Over 20 papers published on conferences and journals. CORE QUALIFICATION • Quality and Reliability Engineering •Project management •Program management • Product Lifecycle Management •SPC, DOE, FMEA •JEDEC, MIL-STD, Telcordia •Reliability Testing, & Qualification •Device Physics •Quality System and Quality Control • ISO 9001:2000 •RMA customer support • OEM management •HALT, HASS, Burn-In, HTOL • environmental shock, vibration •Relex, Weilbull+, ReliaSoft, JMP, Minitab, Fault Tree Analysis •FTIR, SEM, TEM, XRD, XPS, CSAM, Auger, X-Ray •FIT, MTTR, DFMEA, PFMEA •PCBA circuit test and debug • C, C++ language and Python

Experience

  • Sr Product Reliability Manager at Intel Corporation
    Mar 2022 - Present · 4 yrs 4 mos

    Product manager, NPI, test, qualification on finfet 10nm, 7nm foundry process, HBM, DDR5, XCVR, 2.5D, 3D, EMIB package design and reliability qualification.

  • Senior Manager, Device Reliability Test Engineering at Western Digital
    Feb 2014 - Mar 2022 · 8 yrs 2 mos

    work on SSD qualification and SSD drive level DVT/RDT/ORT test, DFMEA, system MTBF reliability prediction and modeling. Work on 3D NAND flash memory technology design, NPI qualification and major customer qualification.

  • Reliability Engineering Failure Analysis Group Lead / Manager at InvenSense, Inc.
    Feb 2009 - Feb 2014 · 5 yrs 1 mo

    Lead and drive new product reliability qualification on MEMS gyroscope products, development of new failure analysis method for MEMS and CMOS related products. Work with CMOS design team, MEMS design team, manufacturing, assembly, wafer foundry process, sales and marketing multifunctional team to drive product quality issues and to work on customer return RMA failure analysis. Lead and manage reliability and failure analysis team on new product reliability qualification on MEMS gyro products. Responsible for failure analysis from new product qualification stage and from customer field return. RMA key contact in Quality Department.

  • Sr. Device Engineer at MoSys
    2007 - 2009 · 2 yrs

    work on 1T SRAM, 1T Flash memory cell design and characterization, design testline structure with layout, tape out to UMC, TSMC foundry. Wafer probe and measurement with SPICE simulation result correlation. IC failure analysis from product qualification.

  • Staff Product Engineer at Telegent Systems
    2006 - 2007 · 1 yr

    new product reliability qualification test on mobile TV analog devices. IC failure analysis on reliability failures. Write procedures for ongoing reliability monitor program, new product qualification process, quality system audit, subcontractor management, ECN and PCN process