Kirti Karan

Senior Lead Engineer at Qualcomm || Ex- ST Microelectronics

Noida, Uttar Pradesh, India

About

Job profile includes: • Leading small teams. • Creating DV architecture. • Experience in UVM based methodology, System Verilog & Assertions. • Experience in test plan creation and related infra such as Monitors, Driver, Scoreboard, Checkers, Functional coverage and Assertions etc. • Experience in AMBA protocols AHB and I2C. • Good knowledge of scripting language like bash scripting. • Solid analytic and debugging skills https://github.com/kirtikaran3 Hardware skills: Microprocessors: Renesas S7G2,MSP432,ARM cortex m,Raspberry Pi Microcontrollers: Arduino,AVR Software Skills: Languages known: UVM,System Verilog,Verilog,C,JAVA Operating systems: Linux(Ubuntu and kali Linux), Raspbian, Windows RTOS: FreeRTOS Tools:Questa Sim,Model Sim,Xilinx ISE,EDA Play Ground,Eclipse,Code Composer Studio,ATMEL Studio,P-Spice Protocols: AMBA AHB,AMBA APB,AMBA AXI,I2C,Ethernet,MQTT,UART,SPI,TCP/IP Scripting languages: bash shell scripting Debugger: linux debugger gdb, UNIX: OS Architecture concepts,IPC and synchronization techniques, Multithreading concepts, Socket programming, Signal Handling, FileSystem. Specialties:Verilog,System Verilog,C,UVM,ARM Based microcontrollers.

Experience

  • Senior Lead Engineer at Qualcomm
    Oct 2022 - Present · 3 yrs 10 mos

  • STMicroelectronics (4 yrs 7 mos)
    • Technical Lead
      Nov 2021 - Oct 2022 · 1 yr

      1. Led a small team of 6 people on various projects. 2. Creating DV architecture 3. Creating test plans for various IPs at SoC level ( for all scenario) which include protocols like SPMI, LVDS. 4. Writing complex test scenario which include both UVM and C tests. 5. Writing scoreboard and latency/interrupt checkers. 6. Reviewing various usecases/scenario from other team member before signing off to final regression suite. 7. Closing 100% FCs and 100% CC ( which include block, fsm, expression, toggle etc) 8. Running selected testcases on netlist as well.

    • Senior Design Engineer
      Apr 2018 - Nov 2021 · 3 yrs 8 mos

  • R&D engineer at DKOP Labs Pvt Ltd
    Apr 2016 - Mar 2018 · 2 yrs

    Designing, Verification

  • Project assistance at Appins technology,Australia
    Jun 2010 - Jun 2011 · 1 yr 1 mo