Marchtrenk, Upper Austria, Austria
Years of experience as IP coordinator and professional knowledge in all areas of digital IP design for SoC projects, including concept, design, verification, synthesis and validation. Expert knowhow in camera interface and imaging IP, also in the areas of interface standards (esp. MIPI Alliance), concept and design of camera solutions and hardware signal processing. Experienced HW design and verification engineer using various languages and methodologies such as: SystemVerilog, VHDL, E, C/C++/SystemC, Matlab,… Familiar with various ASIC and FPGA design flows and the required tools such as: Modelsim, VCS, Synopsys DC and Synplify, Cadence Conformal LEC, Specman, Verdi, Spyglass, …
Matlab verification of Battery Management System (BMS) modules for electric vehicles. System and software requirement analysis, deriving necessary testcases and specification to fulfill automotive-grade module test-requirements. Testcase design and regression execution for several product releases and variants providing the required verification-metrics, reviews and documentation. Evaluation and implementation of 3D image processing methods (detection, segmentation) for medical applications. Inclusion of machine learning methods such as linear regressors and artificial neuronal networks utilizing various frameworks (SciKit Learn, TensorFlow, CNTK and KERAS). Architectural and concept exploration for a Convolutional Neuronal Network (CNN) fixed function hardware accelerator IP framework.
Lead the IP development and verification for several image-processing enhancements (advanced de-noising/sharpening and statistics) and structural architecture updates. Supported architecture and integration for several smart-phone & wearable/IoT SoC projects. IP owner and coordinator for mobile imaging IP. Planning and defining the IP development and roadmap, also evaluating new features and external IP extensions and blocks (DSP/VLIW based solutions, Computer Vision, ...).
Member and active participation in the MIPI UniPro standardization-group. Development of SystemC transaction level models as well as VHDL/RTL refinement and co-simulation of these models. Took over the development and verification for a camera HW IP primarily shaped for feature phone SoC projects and improved its functionality as well as flexibility. Joined the MIPI Camera group in this context and enhanced the CSI-2 sub-IP. Also extended the IP architecture for automotive ADAS applications and developed an FPGA prototype that was used to demonstrate and validate the concept with existing silicon (DSP SoC).