Jörg Hauptmann

Staff Scientist bei Silicon Austria Labs

Austria

About

Experience

  • Silicon Austria Labs (Villach, Carinthia, Austria)
    • Director, Head of Research Unit FEIC
      Mar 2023 - Present · 3 yrs 5 mos

    • Staff Scientist
      Aug 2021 - Feb 2023 · 1 yr 7 mos

      Research Division RF Systems / Research Unit Frontend Integrated Circuits and Systems (FEIC)

  • Engineering manager CTIC Eng at MaxLinear
    Aug 2020 - Feb 2021 · 7 mos

  • Intel Corporation (4 yrs 9 mos)
    • General Manager AMS&RF development Connected Home Devision
      May 2019 - Jul 2020 · 1 yr 3 mos

    • Managing Director Intel Austria GmbH
      Dec 2016 - Jul 2020 · 3 yrs 8 mos

    • Head of AMS & RF development CHD
      Nov 2015 - Jul 2020 · 4 yrs 9 mos

      Head of MS & RF development within Connected Home Division

  • Senior Principal Mixed Signal Design at Lantiq an Intel Company
    Apr 2015 - Nov 2015 · 8 mos

    overall responsibility for MS and RF development within Lantiq Senior Principal MS design head of department MS & RF design

  • Senior Principal MS Design at Lantiq-A GmbH
    2009 - Apr 2015 · 6 yrs 4 mos

    overall responsibility for MS and RF development within Lantiq Senior Principal MS design head of department MS & RF design