Jens Haertel

Vice President Failure Analysis bei Infineon Technologies

Greater Munich Metropolitan Area

About

Experienced Director Quality Management with a demonstrated history of working in the semiconductors industry. Skilled in Semiconductors, Test Engineering, Cross-functional Team Leadership, Integrated Circuits (IC), and CMOS. Strong quality assurance professional with large experience in business process management, initiatives and improvement programs as well as in post merger integration.

Experience

  • Infineon Technologies (14 yrs 4 mos)
    • Vice President Failure Analysis
      Oct 2020 - Present · 5 yrs 9 mos

    • Failure Analysis Global Head
      Oct 2018 - Oct 2020 · 2 yrs 1 mo

    • Director Quality Management
      Apr 2014 - Sep 2018 · 4 yrs 6 mos

  • Director Wafertest at Infineon Technologies Dresden GmbH
    Oct 2006 - Feb 2012 · 5 yrs 5 mos

  • Director Development Center Test at Qimonda Flash GmbH
    Mar 2005 - Sep 2006 · 1 yr 7 mos

  • Senior Manager Test Program Development at Infineon Technologies Flash GmbH & Co. KG
    Mar 2003 - Feb 2005 · 2 yrs

    Senior Manager Test Program Development department within Development Center of Infineon’s joint venture with Saifun Semiconductors (Netanya, Israel) Heading an international team of 18 engineers and several subcontractor engineers for test program development

  • Infineon Technologies Dresden GmbH & Co. OHG (Dresden, Saxony, Germany · On-site)
    • Lead Engineer
      Jan 2001 - Feb 2003 · 2 yrs 2 mos

      Lead engineer for process engineering and development in logic test area, technical and personal responsibility of a group of six engineers

    • Process Engineer Wafertest
      Nov 1995 - Dec 2000 · 5 yrs 2 mos

      Process Engineer Wafertest, focusing on memory test, Speciality RAM and eDRAM testing, 200mm and 300mm support