Barcelona, Catalonia, Spain
Tasks: - Design of an AXI to proprietary bus bridge - Integration of a multicore IP into a higher level SoC - Static signoff flow setup and execution (Lint, CDC, and RDC checks) - Management of a small RTL team Skills: - Familiarized with multicore systems and SoC design (SystemVerilog RTL coding, Synopsys EDA tools) - Familiarized with Synopsys Static verification tools (VC SpyGlass Platform) - Experience with project planning and team management
Tasks: - Architecture design of components for ML training multicore SoC (DMA, power management unit, All-reduce unit) - Execution of the Logic Equivalence Checking flow Skills: - Familiarized with SoC design and verification (SystemVerilog RTL coding, Cadence EDA tools) - Familiarized with the Logic Equivalence Checking flow (Conformal Equivalence Checker) - Experience with multicore systems
Tasks: - Design of a RISC-V multithreaded processor (instruction cache and other DSPs) - Design of a high-speed interconnection system for a multicore SoC - Development of a proprietary bus specification Skills: - Familiarized with SoC design and verification (Synopsys and RealIntent EDA tools) - Experience in RISC-V Instruction Set Architecture
Tasks: - Design and verification of graphics HW accelerators (texture unit) - Design of a RISC-V multithreaded processor (vectorized floating point unit, translation lookaside buffer, page walker, instruction cache and other DSPs) - Design of a high-speed interconnection system for a multicore SoC - Development of a proprietary bus specification - Development of C++ libraries for floating point HW testing Skills: - Familiarized with SoC design and verification (Synopsys and RealIntent EDA tools) - Experience in graphics standards (Vulkan) and Floating Point IEEE754 Standard - Experience in RISC-V Instruction Set Architecture
Tasks: - Design and verification of digital IP for MIMO PLC physical layer (modulator, FFT, filters, buffer management and other DSPs) - Analysis and simulation of DSP algorithms (Matlab) - Assembler real-time programming and debugging - Silicon bring-up and testing Skills: - Familiarized with SoC design and verification (Cadence EDA tools) - Experience in PLC standards (Homeplug, IEEE1901, ITU G.hn) - Experience in MIMO OFDM communication systems (channel model, beamforming, noise covariance, MIMO transmitters and receivers)