Türkiye
Digital Design Engineer with expertise in FPGA development, computer architecture, and computer arithmetic.
IP Owner of: DDR (Controller & PHY), Decoder, and a Multi-Core DSP Active development and integration on 12 nm and 40 nm technology nodes End-to-end SoC development, from IP integration to system-level verification Leading work on custom embedded FPGA architecture and SoC integration
Completed training in functional safety verification with a focus on ISO 26262.
• Key contributor to Turkey’s first FPGA tapeout. • Led the design and verification of a custom FPGA fabric, and supported backend implementation within a RISC-V-based SoC. • Built automated tools to streamline hardware design and testing, improving efficiency and consistency. • Applied equivalence checks, gate-level simulations, and custom verification methods to verify the eFPGA IP. • Developed early place & route flows to assess floorplan, congestion, and timing feasibility. • Applied low-power techniques to meet performance and power goals in tight design constraints. • Developed timing requirements and performed STA to verify the design’s performance. • Worked with industry-standard EDA tools on a full design flow targeting TSMC 55nm
Developed high-performance digital circuits, including a floating-point reduction circuit with superior frequency-area performance and an open-source DSP block for OpenFPGA architectures. Addressed challenges in high-frequency floating-point reduction and efficient DSP resource sharing. Conducted research on multi-cycle folded integer multipliers, achieving significant area and energy savings, and designed a customizable generator for optimizing throughput, latency, and frequency. Designed a pipelined CPU architecture with advanced features such as branch prediction and forwarding, contributing to enhanced performance and area efficiency.
Supported and assisted students in digital design coursework and lab experiments. Graded assignments and offered teaching assistance to students.