San Francisco Bay Area
- As part of rotation program, I worked in the Verification and Performance Modelling team within System IP. - Responsible to update and maintain IP-XACT for interconnect IP. - Updated model of DDR5 memory and analysed the performance by running SPEC benchmarks. - Created functional coverage for link/transaction layer of cxl/ccix protocols in uvm testbench.
Graduate Teaching Assistant for ECE 6100 - Advanced Computer Architecture
Worked on PPA analysis for storage element implementation in GPU module Tools used: Synopsys Fusion Compiler (Synthesis) , Synopsys PTPX (Power estimation)