Bengaluru, Karnataka, India
SRAM Compiler design, characterization & verification engineering professional with +2 years of hands on experience in various kind of SRAM circuit design, critical path modeling, memory compiler characterization, design verification, design quality check and data verification. Looking for an opportunity in memory circuit design and verification domain. * High Density Single Port Multi Bank (HD SPMB) SRAM compiler design. * Critical path modeling for HD SPMB SRAM . * Design , Characterization & verification of SRAM memory compiler. * Read Margin (RM), Write Margin (WM), & On Chip Variation (OCV) margins check. * Sense amplifier analysis and offset voltage reduction. * Static time analysis for SRAM using Synopsys NANO TIME and verify various setup hold and margin arcs used in characterization. * Equivalence check for SRAM implementation with behavioral Verilog using Synopsys ESPCV.