Barcelona, Catalonia, Spain
Harald is an HPC system enthusiast with strong knowledge in monitoring systems, parallel programming models, compilers and computer architecture. He currently works at Intel Corp. on code modernization topics for the next generation HPC systems (including Xeon and GPU-based systems). Harald has been involved in multiple open-source projects, including the Flexible Memory Allocation Tool (https://github.com/intel/flexmalloc), the Intel® Application Migration Tool for OpenACC® to OpenMP® API (https://github.com/intel/intel-application-migration-tool-for-openacc-to-openmp), and the Profiling Tools Interfaces for GPU (https://github.com/intel/pti-gpu). Before joining Intel, he was the maintainer of the instrumentation library for the BSC performance tools suite (Extrae) while adapting it to new technologies and pursuing large scalability. In 2015, he received his Ph.D. in providing instantaneous metrics combining coarse-grain instrumentation and sampling techniques. His thesis resulted in a tool named Folding that easily points out the nature of the performance bottlenecks and their location in the application code. Not only this but during his research, he explored the performance of several in-production applications and applied simple and well-known code transformations to increase the application performance.
Working on code modernization for next-generation HPC systems.
Working on code modernization topics -- porting codes to recent Intel-related products such as Xeon Phi and FPGA. Involved in EU projects in which Intel collaborates as a technical partner. Supporting our customer.
Responsible for the instrumentation part at the performance tools team.