Hannover-Braunschweig-Göttingen-Wolfsburg Region
Experienced Chief Executive Officer with a demonstrated history of working in the semiconductors industry. Skilled in Embedded Software, Video Processing, Application-Specific Integrated Circuits (ASIC), Semiconductors, and Computer Architecture. Strong information technology professional with a Dr.-Ing. focused in Electrical Engineering from Universität Hannover / University of Hanover.
Co-Founder, CEO and CTO. Responsible for all operations. Strategic planning, financial planning, fund raising, investor relations. Growth of revenue and team. Sales and marketing strategy, build-up of sales reps, customer acquisition, quotations, partnerships. Contract negotiations, set-up and management of IP licensing contracts. Overall technical lead, management of product portfolio. Project management of chip implementations. Technical expertise on optimized video codec / vision scheme implementations on programmable DSP. videantis has been named one of the 50 fastest growing technology companies in Germany for the third time and has won the Red Herring Top 100 Europe Award.
Developed and optimized programmable video processor architectures. Defined instructon set extensions, memory architectures and parallelization strategies. Performed software implementations and optimizations of video codecs on programmable video processors. Developed a dynamic performance estimation scheme for multimedia applications on programmable video processors. Project lead for 180nm silicon implementation of a multi-core heterogeneous multimedia processor. Lead a local team of 8 members and coordinated implementation and chip fabrication across 3 continents with partners Micronas (Germany), Tality/Cadence (Ireland/USA), and UMC (Taiwan). Prepared and executed company spin-off from University of Hannover, handling all legal and financial aspect. Performed customer acquisition for spin-off.
Implemented fast VLD on the V830 low power multimedia RISC processor. Performed real-time optimization of an MPEG-1 decoder on the V830 multimedia RISC processor. Implemented an MPEG-2 decoder on the Pentium MMX processor. Developed a code positioning method for the reduction of cache misses in multimedia applications.