Guillaume JOLI

Digital Front-end Lead on mixed signal SoC ASICs

Lancy, Geneva, Switzerland

About

20 years of Experience in Project Leading & Management, Embedded Hardware & Software Architect, System Verification, IC Design, FPGA, ASICs & EDA. intelFPGA/Altera & Doulos Certified Instructor for France & Western-Europe Specialties: Digital Electronics, Embedded software, FPGA, PCIe, Ethernet, ASIC System Verilog, VHDL, Verilog, System C Embedded Systems, Low Level Drivers, Linux UVM, OVM, VMM, TLM-2.0 C/C++, Assembly Python Company IT, Security, Virtualization, Remote access / VPN / VOIP manager

Experience

  • Digital Front-end Lead at SCALINX
    Apr 2023 - Present · 3 yrs 4 mos

    Leading the Digital Front-end team on complex mixed signal SoC ASICs I am responsible of the following topics : * Customer direct collaboration to converge on technical requirements * IP selection and IP provider management * Internal requirement management * SoC + System Architecture * RTL design * LINT, CDC, RDC and DFT checks * Timing constraints, SDCs * Synthesis My team is 15+ FTEs (staff + contractors) with direct reporting. I also directly interact with all other engineering teams (total of +50FTEs) on the following topics : * Engineering : Overall process, strategy and collaboration in relationship with Engineering Director and other team lead. * BE : Physical floorplan, Placement and optimisations * DFT : Chip DFT strategy + ATE / production tests * SW : Support for Software programming model * Verification : Support of the UVM and Emulation verification team I am also in charge of the process, planning, load balancing, Program reporting and overall projects strategy.

  • Principal Firmware and Verification Engineer at Mercury Systems
    Jan 2021 - Mar 2023 · 2 yrs 3 mos

    Developing and verifying embedded avionics video computers in DO-254 / AMC 20-152A up to DAL A context. • Leader in an international team of 15 engineers (10 staff and 5 subcontractors - on and off-site) • Airborne computer definition and architecture with close interactions with end customers • Project management within a strict DO-254/AMC 20-152A process • Subcontracting activities definition, selection and follow-up • Firmware development and IP integration using VHDL and SystemVerilog (Xilinx and Microsemi FPGAs) • Firmware verification using UVM (Testbench & VIP development + test implementation) • Firmware physical tests on target • Close interactions with other teams (Project, System, Hardware, Software and Mechanical) • Customer support on site, troubleshot functional issues and solve problems • Agile and classical waterfall DO-254 flow Technical features : - Xilinx Versal, Ultrascale+ and 7-series technology - PCIe Gen 1 -> 4 with bus master DMA targeting CPU and GPUs - High speed video interfaces (3G-SDI and ARINC 818) - Video routing and processing - DDR4 External memory interfaces - AXI-MM based interconnect - AXI-ST based processing pipeline - UVM based simulation environement

  • Senior Electronic Engineer at LEM
    Aug 2019 - Dec 2020 · 1 yr 5 mos

    I am developing a new line of innovating high precision current / voltage sensors

  • Project Leader, System Architect & IC Designer at A.L.S.E
    Aug 2006 - Aug 2019 · 13 yrs 1 mo

    # System Architect # Project Definition & Management # SystemVerilog, VHDL & Verilog Expert : - Full design of a 10/100/1G/10G Ethernet Hardware Stack + MAC IP - PCIe x4 Gen1, Gen2 & Gen 3 designs + 64 Bits Linux driver development - JESD204b IP developpement interfacing 8 ADCs per board / a network of 16 boards sampling synchronously at 200MSPS (all ADCs are fully synchronous). - High Speed Communication Designs with boards synchronisation (Using a fabric of 384 x 6G Serdes) - Full DDR, DDR2, Mobile DDR Memory Controllers running in various industry (Embedded Aeronautical, Automotive...) # Embedded & Station Linux programming - Low level Drivers developments (PCIe) - RealTime Computing - RTOS (Linux, uCOSII, eCos...) # Verification Methodology - UVM, OVM, VMM # System Modelisation - SystemC - TLM-2.0 # Developments on Altera, IntelFPGA, Xilinx, Actel & Lattice FPGAs including the following FPGAs : * Stratix 10, Arria 10, Arria V SoC, Cyclone V SoC... * Ultrascale, Zynq, Artix 7, Virtex 7, Kintex 7, Spartan 6.... # Doulos Certified Instructor (such as UVM, System Verilog, VHDL, SystemC...) # Altera Certified Instructor (Quartus Pro, Qsys / Nios, SOPC Builder...)

  • Aeronautical Embedded Software Engineer at CS Communication & Systèmes
    Sep 2005 - Aug 2006 · 1 yr

    # Several Aeronautical DO-178B / DO-254 - Level A, B & C Embedded Software Developments # Contractor for the Aeronautic Industry such as Messier-Bugatti, Safran (SNECMA), Sagem & Thales.