Frank Poppen

Digital Modelling and Design Engineer

Greater Oldenburg Area

About

Experience

  • NXP Semiconductors (Hamburg, Germany)
    • Digital Modelling and Design Engineer
      May 2026 - Present · 2 mos

    • System Modelling Engineer
      Oct 2022 - Apr 2026 · 3 yrs 7 mos

  • Senior Research Engineer at German Aerospace Center (DLR)
    Jan 2022 - Oct 2022 · 10 mos

  • Senior Researcher at OFFIS - Institute for Information Technology
    Sep 1999 - Jan 2022 · 22 yrs 5 mos

    Frank is a member of the OFFIS Division “Transportation” and responsible for EDA (Electronic Design Automation) design flows for ASIC and FPGA at OFFIS. His research focus is on low power design, as well as, measuring productivity (including complexity and quality) of such flows. His experience includes tools of Synopsys, Cadence, Mentor, Xilinx, Altera and more. Since 2001 he is a member of the SNUG Europe Technical Committee of which he is the Technical Chairperson since 2007.