Greater Lyon Area
SiliconTM on LIDAR ASIC for automotive market ISO26262, ASIL, SPAD, Photonics, Time Of Flight, ADMS, MCU Customer technical interface Schedule and reporting Cross-functional team coordination from architecture to analog&digital design and verification, physical implementation, DFT, FW Facilitate negociations, conflict resolutions Interface with ip providers, packaging, quality, test engineering, silicon validation teams, project and team managers
Design Technical Lead at ST-Ericsson & STM High Level Synthesis (HLS) expertise 2D accelerator (used on display interfaces and imaging correction) Imaging Signal Processors Appointed MTS (Member of Technical Staff) in 2012 Moved to ST Imaging Division in 2013
Introduction to HLS (high level synthesis) design technics (from C/C++ to RTL) For students in their last year of engineering school
Object Lead & IP Design & SOC Integration at ST-Ericsson Display Interface on mobile processors (from application layer to PHY, using MIPI DSI/DPI/DBI, Display Port, and HDMI standards) Transversal function including Hardware design and verification, FPGA prototyping, DFT/Production testing, Software, Silicon validation, Customer support
Project Lead & IP Design & Team Methodology at STM PHY/High Speed Links (Fiber Channel/Gigabit Ethernet/USB2/HDMI/SATA/SAS/PCI-Express) Mixed signal Analog/Digital