Evanston, Illinois, United States
Passionate bike rider, bass angler, golfer, and skier with desires to have positive impact on others.
Full patent prosecution on the subject matters comprising HBM (high bandwidth memory), SOC (system on chip), chiplet packaging, DRAM, 3D NAND, Gate All Around FET CMOS logics, OLED Display, and Si photonics for network system.
Competitive analysis on technology, Valuation for investment, Strategy development, and Leading multiple organizations of semiconductor development, including Device,Reliability,Chip analysis, and Process Integration. 96 Tiers QLC memory process integration. 321 Tiers TLC memory process integration.
People management - Technology development & Transfer. -- 3D NAND 64 Tiers TLC Process Integration Manager -- 3D NAND QLC Process Integration Manager