Dhruv Thakkar

Mechatronics @ UWaterloo | Hardware Design & Test | PCB, Power Electronics, Embedded Systems | Ex-Siemens Energy · Ciena · Blumind · IQC

Waterloo, Ontario, Canada

About

Mechatronics engineering student at the University of Waterloo (Class of 2026) with 6 co-op terms across hardware design, power electronics, embedded AI, and quantum computing hardware. I've shipped real hardware across diverse domains — from GaN FET characterization at Transphorm to optical network board design at Ciena, edge AI accelerator work at Blumind, and ion-trap quantum processor testing at the Institute for Quantum Computing. My upcoming term at Siemens Energy focuses on hardware quality in the energy sector. Core skills: PCB design & layout · Power electronics (GaN, SiC) · Embedded systems (C/C++, RTOS) · FPGA/hardware validation · Signal integrity · CAD (SolidWorks, Altium) · Python · CAN bus & automotive protocols Open to new grad full-time roles in hardware design, hardware test, or embedded systems engineering — particularly in energy, semiconductors, automotive, or deep tech.

Experience

  • Hardware Quality Intern at Siemens Energy
    May 2025 - Sep 2025 · 5 mos

    - Wrote EHS reports for Nuclear refurbishment projects. -Built an AI-powered Python tool to parse supplier and company Certificates of Conformance, generating comparative reports and eliminating manual checks — reducing project turnaround time by 80%.

  • Hardware Design Intern at Ciena
    Jan 2025 - Apr 2025 · 4 mos

  • Embedded AI/ML Software Engineer Intern at Blumind
    May 2024 - Aug 2024 · 4 mos

    -Developed a Python automation script using pandas to generate register address and bitfield mapping tables, reducing manual validation time by 70% and improving documentation consistency. -Led SPI link validation across 4 firmware and board revisions for an ultra-low-power edge AI inference chip, improving data link reliability and reducing communication faults by 40%. -Supported hardware test bench setup and schematic review for mixed-signal PCBs targeting sub-milliwatt AI inference at the edge.

  • HW Engineering Intern at Institute for Quantum Computing
    Sep 2023 - Dec 2023 · 4 mos

    - Designed an advanced 4-layer through-hole test harness PCB in Altium for a trapped-ion quantum processor, reducing debug time by 60% through optimized signal routing. -Conducted component-level and signal integrity testing on RF amplifier systems in the 4–8 GHz range, improving gain flatness and reducing noise figure for quantum control electronics. -Contributed to hardware bring-up and characterization of custom RF circuits used in ion-trap qubit manipulation systems.

  • Applications/Product Engineering Intern at Transphorm Inc.
    Jan 2023 - Apr 2023 · 4 mos

    -Characterized and benchmarked a 1200V GaN FET using lab equipment and LTspice simulations, generating datasheet-ready performance data for a high-voltage power device. -Designed a Dynamic Ron test board schematic and PCB in Altium, improving signal integrity and power distribution by 12%. -Automated voltage surge testing using a multithreading algorithm, enhancing lab safety by 70% and reducing manual intervention during high-voltage characterization.