United States
Highly accomplished semiconductor technology professional with 25+ years of experience in research, development, and manufacturing. Expert in CMOS logic and memory technologies, with a proven track record of leading device and process integration teams, driving technology solutions, and managing customer engagement programs. Experienced in successfully transferring advanced technologies from R&D to high-volume production.
Spearheaded the transition to in-house fabricated Full Self-Driving (FSD) hardware, including the HW3 chip deployed in 2019, which utilized a 14nm process with dual neural processing units for 144 TOPS of AI inference, enabling real-time object detection and path planning in over 2 million vehicles. - Oversaw the development of Dojo supercomputer tiles starting in 2021, leveraging TSMC's 7nm process for exaFLOP-scale training of vision-based neural networks on petabytes of fleet data.
Managed the upgrade to HW2.5 in 2017, introducing redundant computing for fault tolerance and enhanced video processing, which unlocked Sentry Mode and Dashcam capabilities while supporting early Full Self-Driving beta testing. Coordinated with supply chain partners to integrate immersion lithographyderived 16nm processes for improved power efficiency, reducing thermal throttling in high-compute scenarios.
As a key leader in technology development, directed device engineering for GlobalFoundries' advanced nodes, focusing on low-power and highperformance solutions for mobile and IoT applications post the 2009 AMD spin-off. Oversaw the maturation of 45nm and 32nm bulk processes with high-k/metal gate (HKMG) integration, optimizing strained silicon channels for 0.183μm² SRAM cells used in AMD's Llano APUs and early ARM-based SoCs.