David Chong

Driving Process Integration & Pathfinding | Compound Semiconductor expert - LED, VCSEL, GaN | Six Sigma Practitioner

Singapore

About

Technical Project Lead with R&D technology development experience in the memory chip and optoelectronics industry. Experienced in pilot line startup and qualify new technology from R&D to mass production. Skilled in front end wafer fabrication of LED/VCSEL and wafer level integrated optics. Enjoy delivering creative engineering solutions!

Experience

  • MM Wave IC Technology Backend PI Lead at National Semiconductor Translation and Innovation Centre for Gallium Nitride - NSTIC (GaN)
    Jul 2025 - Present · 1 yr

    Advanced backend processes integration lead, including temporary wafer bonding/debonding, through-via (via) development for SiC and Si, and backend metallization. Optimization to support reliable device fabrication and performance.

  • Senior Principal Engineer - Cell Development at REC
    Jan 2023 - Jun 2025 · 2 yrs 6 mos

    Process development of next generation silicon solar cell with new device architecture. Support Industrialization of new technology

  • Senior Staff Project Lead/Integration - VCSEL New Product Development at ams AG
    Dec 2019 - Dec 2022 · 3 yrs 1 mo

    Led end-to-end integration and project execution for advanced VCSEL technology development, including wafer-level optics, frontend processing, and backside/flip-chip integration. Translated customer requirements into improved device designs and integration schemes, delivering samples through both in-house and foundry fabrication. Managed cross-functional stakeholders to overcome roadblocks, ensure on-time delivery within budget, and develop cost models for new technologies. Guided a team of engineers to resolve complex manufacturability challenges, successfully delivering over 10 new device architectures despite COVID-related constraints.

  • Lumileds (8 yrs 6 mos)
    • Process Integration Staff Engineer
      Jan 2017 - Dec 2019 · 3 yrs

      Drove continuous improvement across engineering processes, leading company-wide cost reduction initiatives that achieved management targets for three consecutive years. Investigated and resolved complex integrated process issues and customer incidents, while serving as the integration owner for engineering control plans and FMEA. Collaborated closely with equipment and unit process engineers to optimize process setups, enhance existing capabilities, and deliver sustained performance improvements.

    • R&D Staff Process Engineer
      Jul 2014 - Dec 2016 · 2 yrs 6 mos

      Designed and developed next-generation LED architectures tailored to customer requirements, delivering high-performance, cost-effective solutions. Collaborated with equipment and design teams to establish new processes, leveraging existing tool capabilities and advancing plasma etch techniques to optimize device profiles and improve die quality. Qualified and released more than 10 die designs for mass production, led cross-functional teams to meet challenging targets, mentored engineers in achieving technical breakthroughs, and authored key documentation to support successful product ramp-up.

    • NPI Staff Process Engineer
      Jul 2011 - Jul 2014 · 3 yrs 1 mo

      Established and qualified a world-leading 6-inch GaN LED manufacturing line in Singapore, serving as the key process owner for all plasma etch operations. Successfully industrialized a chip-scale packaging (CSP) line from R&D to full manufacturing, developing and optimizing plasma dry etch processes. Drove pilot line optimization for automotive and illumination applications, led cross-functional initiatives to enhance die quality and reduce costs, and authored critical documentation to enable smooth mass production of new products.

  • Senior Process Engineer at Micron Technology
    Jun 2006 - Jun 2011 · 5 yrs 1 mo

    Specialize in high aspect ratio container plasma etching, one of the most challenging process plant wide. Member of Advance Development Team, responsible for set up, develop and optimize process for yield ramping for pilot line start up. Coordinate technology/knowledge transfer from US to Singapore and from Singapore to other plants worldwide.